A counter is constructed with three D flip-flops. The input-output pairs are named (D0, Q0), (D1, Q1), and (D2, Q2), where the subscript 0 denotes the least significant bit. The output sequence is desired to be the Gray-code sequence 000, 001, 011, 010, 110, 111, 101, and 100, repeating periodically. Note that the bits are listed in the Q2 Q1 Q0 format. The combinational logic expression for D1 is
Correct Answer :
Q̅2 Q0 + Q1 Q̅0
Solution :
To design the counter, we first list the desired state transition sequence. The outputs of the three D flip-flops represent the state variables , , and , where the bits are given in the order .
For a D flip-flop, the next-state equation is given by:
Therefore, the input to the second flip-flop must be equal to the next-state value of (i.e., ).
Let's map each current state () to its corresponding next state () based on the given periodic sequence:
1. Current State: 000 ⇒ Next State: 001 (so )
2. Current State: 001 ⇒ Next State: 011 (so )
3. Current State: 011 ⇒ Next State: 010 (so )
4. Current State: 010 ⇒ Next State: 110 (so )
5. Current State: 110 ⇒ Next State: 111 (so )
6. Current State: 111 ⇒ Next State: 101 (so )
7. Current State: 101 ⇒ Next State: 100 (so )
8. Current State: 100 ⇒ Next State: 000 (so )
We compile these values into a truth table to find the logic function for as a function of the current states ():
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 1 | 1 |
| 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 0 | 0 | 0 |
From the table, the minterms for which correspond to the following current states:
- (minterm 1)
- (minterm 3)
- (minterm 2)
- (minterm 6)
We can simplify this logic expression using a Karnaugh map (K-map):
| 00 | 01 | 11 | 10 | ||
| 0 | 0 | 1 | 1 | 1 | |
| 1 | 0 | 0 | 0 | 1 | |
Let's identify the prime implicants to group the 1s:
1. **First Group**: Grouping the two adjacent 1s in the first row () at columns and . This eliminates and yields:
2. **Second Group**: Grouping the adjacent 1s at column across rows and . This eliminates and yields:
Combining these two groups gives the minimized sum-of-products expression for the combinational logic input :
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